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ARM64 Registers

General Purpose Registers (GPRs)​

  • X0 - X30: These are the 31 general-purpose 64-bit registers used for data processing, addresses, and various other operations. The lower 32 bits of these registers are accessible using W0 - W30. These registers are used for function parameters, return values, and local variables.

  • XZR/WZR: The zero register always reads as zero and can be written to, but the value is discarded. It is often used for operations where a zero value is needed.

  • SP (Stack Pointer): Points to the current stack location. It's used for stack operations such as function calls, local variable storage, and managing the call stack.

  • LR (Link Register, X30): Stores the return address for function calls. It's used to return control to the calling function.

  • FP (Frame Pointer, X29): Points to the base of the current stack frame. It's used to reference function parameters and local variables within the current frame.

Special Registers​

  • PC (Program Counter): Holds the address of the current instruction being executed. It automatically increments to point to the next instruction.

  • NZCV (Flags Register): Stores the condition flags resulting from arithmetic and logical operations. These flags include:

    • N (Negative): Set if the result of an operation is negative.
    • Z (Zero): Set if the result of an operation is zero.
    • C (Carry): Set if there is a carry out of the most significant bit in an addition or a borrow in a subtraction.
    • V (Overflow): Set if there is an overflow in signed arithmetic operations.

SIMD and Floating-Point Registers​

  • V0 - V31: These are the 32 SIMD (Single Instruction, Multiple Data) and floating-point registers. Each register is 128-bits wide and can be accessed in different sizes (8, 16, 32, 64, or 128 bits) for various operations on integers and floating-point numbers.

System Control Registers​

These registers control various aspects of the ARM64 processor's operation. Some important system control registers include:

  • SCTLR_EL1: System Control Register for Exception Level 1. Controls system behavior such as cache settings, memory alignment, and access permissions.

  • TTBR0_EL1 and TTBR1_EL1: Translation Table Base Registers. They hold the base addresses of the translation tables used for virtual memory translation.

  • TCR_EL1: Translation Control Register. Configures the translation table format and memory attributes.

  • SP_EL0, SP_EL1, SP_EL2, SP_EL3: Stack pointers for different exception levels.

Exception Level Registers​

  • ELR_EL1, ELR_EL2, ELR_EL3: Exception Link Registers. Hold the address to return to after handling an exception at the corresponding exception level.

  • SPSR_EL1, SPSR_EL2, SPSR_EL3: Saved Program Status Registers. Save the state of the program when an exception occurs.

Practical Use in ARM Scheme​

  • Function Calls and Stack Management: The GPRs are heavily used in function calls and returns. Parameters are passed in X0-X7, and the return address is stored in the LR. The SP is adjusted to create stack frames, and the FP is used to access local variables.
  • Arithmetic and Logic Operations: The GPRs are also used for all arithmetic and logic operations, with the results affecting the NZCV flags for conditional operations.
  • System Configuration: System control registers are used to configure the processor's operation, manage memory translation, and control access permissions, ensuring secure and efficient operation.

Understanding these registers and their roles is crucial for low-level programming, performance optimization, and systems development on ARM64 platforms.

The specifics of the X8 and X16 registers in the ARM64 architecture and how they are commonly used:

X8 Register​

X8 is one of the general-purpose registers in ARM64. Its use is often determined by the calling convention and the specific ABI (Application Binary Interface) that the system follows. Here's a detailed look:

  • Procedure Call Standard: According to the ARM64 Procedure Call Standard (AAPCS64), X8 is designated as the Indirect Result Location Register. When a function returns a structure or a large result that cannot fit into the standard return registers (X0-X7), a pointer to the memory location where the result is stored is passed back through X8.

X16 and X17 Registers​

X16 and X17 are general-purpose registers with special roles during specific operations, especially those involving indirect function calls and dynamic linking. Here's how they are typically used:

  • Intra-Procedure-Call Scratch Register (IP0) - X16: This register is designated as IP0 in the AAPCS64. It is used as a temporary register to hold intermediate values during function calls, especially in position-independent code where addresses might need to be calculated dynamically.

  • Intra-Procedure-Call Scratch Register (IP1) - X17: Similarly, X17 is designated as IP1. It is also used for holding intermediate values during function calls, particularly for dynamically linked libraries and position-independent executables.

Detailed Use Cases​

  • Dynamic Linking and PLT: When dealing with Position-Independent Executables (PIE) and shared libraries, X16 and X17 are used by the Procedure Linkage Table (PLT). The PLT entries use these registers to resolve the actual addresses of dynamically linked functions.

  • Function Call Trampolines: In some scenarios, X16 is used to hold a function pointer temporarily before a branch or call instruction. This is particularly useful in runtime environments where the exact function address might be resolved at runtime, such as in Just-In-Time (JIT) compilation.

Summary​

  • X8: Indirect result location register, used to pass pointers to large return values from functions.
  • X16 (IP0) and X17 (IP1): Temporary scratch registers used during function calls, especially for address calculations in position-independent code and dynamic linking.

Note: This is not intended to be a full reference for assembly. The documentation released by ARM is several thousands of pages. Read this to cure insomnia...